Digital Techniques (DTE) 22320 MCQ I-scheme pdf with answers



5. Programmable Logic

 

The inputs in the PLD are given through ____________.

a) NAND gates

b) OR gates

c)NOR gates

d)AND gates

Ans: d)AND gates

 

Outputs of the AND gate in PLD is known as ____________

a) Input lines

b) Output lines

c) Strobe lines

d) Control lines

Ans: b) Output lines

 

The least complex form of PLDs is_____.

a)FPGA

b)SPLD

c) CPLD

d) None of the above

Ans: b)SPLD

 

 

PAL stands for________________.

Recall/ Remembering

a) Programmable Array Logic

b) Programmable Logic Array

c) Programmable Array Loaded

d) Programmable Level Array

Ans: a)Programmable Array Logic

 

 

FPGA is the abbreviation for ______.

a) Five Programmable Gate Arrays

b) Field Programmable Gate Arrays

c) Field Programmable Gate Amplifier

d) none of the above

Ans: b) Field Programmable Gate Arrays

 

PLAs, PALs, CPLDs, and FPGAs are types of _____.

a) PLDs

b)SLDs

c) EPROM

d) SRAM

Ans: a) PLDs

 

 

The PLD which is  aOTP(One Time Programmable) logic device is_______.

a) PLA

b) PAL

c)CPLD

d) SLD

Ans: b)PAL

 

A GAL is essentially a ________.

a) Non-reprogrammable PAL

b) ROM  PAL

c) Very large PAL

d) Reprogrammable PAL

Ans: d) Reprogrammable PAL

 

 

Programmable logic array is a______.

a)Two Level OR-OR Device

b)Two Level of AND-AND Device

c) Two Level OR-AND Device

d) Two Level AND-OR Device

Ans: d)  Two Level AND-OR Device

 

 

OLMC stands for________.

a) Output logic macro cells

b) Output logic micro cells

c) Output level macro cells

c) Output level micro cells

Ans: a) Output logic macro cells

 

The complex programmable logic device contains several PLD blocks and __________

a)  A language compiler

b)AND/OR arrays

c)Global interconnection matrix

d) Field-programmable switches

c)Global interconnection matrix

Ans: a) Output logic macro cells

 

FPGA architecture are based on a type of memory called a _________.

Understanding

a) Look up table (LUT)

b)Lookdown table (LDT)

c) EPROM

d) PROM

Ans: a) Look up table (LUT)

 

Significance of the SOC control line, in the analog to digital converter is_________.

a) Start of concept

b) Significance of conversion

c) Start of conversion

d) None of the above

Ans: c) Start of conversion

 

In ADCs, it is possible to reduce the quantization error by _______the number of bits.

a) Increasing

b)Decreasing

c)Maintaining consistency in

d) All of the above

Ans: a) Increasing

 

Application of dual slope converter is______.

a)Thermocouple

b)Digital panel meter

c) Analog oscilloscope

d) DAC

Ans: a) Digital panel meter

 

Identify an ADC in which a DAC is used.

a) Successive approximation register type ADC

b) Single slope ADC

c)Dual slope ADC

d)Flash type ADC

Ans: a)  ) Successive approximation register type ADC

 

A SAR ADC consists of the following:

Understanding

a) Priority encoder

b) SAR  and comparator

c)Integrator

d) Voltage divider network

Ans: b) SAR and comparator

 

The SAR ADC is the commonly used architecture for _________.

Application

a)DAC

b)Analog meters

c) Multiplexers

d) Data acquisition systems

Ans: d) Data acquisition systems

 

 

The time taken for the output of DAC to settle within a specified band of its final value is referred as______.

Recall/ Remembering

a) Resolution

b)Accuracy

c) Settling time

d) Linearity

Ans: c) Settling time

 

 

The resolution of 8 bit DAC will be_______.

Application

a) 562

b)625

c)256

d) 265

Ans: c) 256

 

 



The digital data input in DAC IC 0808 is_____ .

Recall/ Remembering

a)8 bit parallel

b)16 bit parallel

c) 7 bit parallel

d) Series

Ans: a) 8 bit parallel

 

 

The difference between the analog signal and the closest available digital value at each sampling instant from the A/D converter is called as______.

Recall/ Remembering

a) Quantization error

b) Sampling error

c)Monolithic DAC

d)Hybrid DAC

Ans: a) Quantization error

 

The resolution of a 10-bit AD converter for an input range of 10v is______.

Application

a) 97.7m v

b) 9.77mV

c)0.977mV

d) 977mV

Ans: b) 9.77mv

 

The maximum deviation between actual and ideal converter output after the removal of error is called as ________.

Understanding

a)Absolute accuracy

b)Relative accuracy

c) Linearity

d) Resolution

Ans: b) Relative accuracy

 

In the design of all microprocessor-based systems, semiconductor memories are used as primary storage for _______.

Recall/ Remembering

a) Only code

b)Only data

c) code and data

d)None of the above

Ans: c) code and data

 

A disk and tape are types of________.

Understanding

a) Sequential memory

b)RAM

c)ROM

d) Flip-flop

Ans: a) Sequential memory

 

Semiconductor memories are sometimes referred to as _________.

Recall/ Remembering

a)Secondary memory

b)Primary memory.

c) External memory

d) Extended memory

Ans: b)Primary memory.

 

The speed of the memory at which it accesses the data is also referred as  _____.

Recall/ Remembering

a) Access time

b)Settling time

c)Conversion time

d)Speed time

Ans: a) Access time

 

 

How many storage locations are available when a memory device has twelve address lines?

Application

a) 144

b) 4096

c)512

d) 2048

Ans: b) 4096

 

The basic operations performed by a memory chip are

Understanding

a)Read

b)Write

c) Analyse

d) Read and Write

Ans: d)Read and Write

 

 

The two kinds of main memory are_______.

Recall/ Remembering

a) Primary and Secondary

b)Cache 1 and Cache2

c) RAM and ROM

d)None of the above

Ans: c)RAM and ROM


A RAM is an abbreviation for ______________.

Understanding

a) Random Access Memory

b)Non-volatile memory

c)Read only memory

d) Flip-flop

Ans: a) Random Access Memory


Download

Comments

Popular posts from this blog

Getting started with c programming (step-by-step) explanation

22413 software engineering notes [ ⚠️] pdf | Msbte 4th semester diploma

22620 Network and Information Security NIS solved lab manual pdf